ARM is a 32-bit reduced instruction set computer (RISC) instruction set architecture (ISA) developed by ARM Holdings. It was known as the Advanced RISC Machine, and before that as the Acorn RISC Machine. The ARM architecture is the most widely used 32-bit ISA in terms of numbers produced.Originally conceived by Acorn Computers for use in its personal computers, the first ARM-based products were the Acorn Archimedes range introduced in 1987.
The relative simplicity of ARM processors makes them suitable for low power applications. As a result, they have become dominant in the mobile and embedded electronics market, as relatively low-cost, small microprocessors and microcontrollers. In 2005, about 98% of the more than one billion mobile phones sold each year used at least one ARM processor. As of 2009, ARM processors account for approximately 90% of all embedded 32-bit RISC processors and are used extensively in consumer electronics, including PDAs, mobile phones, digital media and music players, hand-held game consoles, calculators and computer peripherals such as hard drives and routers.
OPERATING
MODES
The Programmers Model can be split into two elements - first of all, the
processor modes and secondly, the processor registers. So let’s start by
looking at the modes.
Now the typical application will run in an unprivileged mode know as
“User” mode, whereas the various exception types will be dealt with in one of
the privileged modes : Fast Interrupt, Supervisor, Abort, Normal Interrupt and
Undefined (and we will look at what causes each of the exceptions later on).
NB - spell out the word FIQ, otherwise you are saying something rude in
German!
One question here is what is the difference between the privileged and
unprivileged modes? Well in reality very little really - the ARM core has an
output signal (nTRANS on ARM7TDMI, InTRANS, DnTRANS on 9, or encoded as part of
HPROT or BPROT in AMBA) which indicates whether the current mode is privileged
or unprivileged, and this can be used, for instance, by a memory controller to
only allow IO access in a privileged mode. In addition some operations are only
permitted in a privileged mode, such as directly changing the mode and enabling
of interrupts.
All current ARM cores implement system mode (added in architecture v4).
This is simply a privileged version of user mode. Important for re-entrant exceptions because
no exceptions can cause system mode to be entered.
The ARM has seven basic operating modes:
•
USER : unprivileged mode under which
most tasks run
•
FIQ : entered when a high priority
(fast) interrupt is raised
•
IRQ : entered when a low priority
(normal) interrupt is raised
•
SUPERVISOR :entered on reset and when a
Software Interrupt instruction is executed
•
ABORT: used to handle memory access
violations
•
UDEF: used to handle undefined
instructions
•
SYSTEM :
privileged mode using the same registers as user mode
3-STAGE
PIPELINING
The ARM7 and
earlier implementations have a three stage pipeline; the stages being fetch,
decode.
1) Fetch
Ø The
instruction is fetched from memory and placed in the instruction pipeline.
2) Decode
Ø The
instruction is decoded and the datapath control signals prepared for the next
cycle.
3) Execute
Ø The
register bank is read, an operand shifted, the ALU result generated and written
back into destination register.
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